1. Field of the Invention
This invention relates to the field of electronics. More particularly, the invention relates to an electronic system and method for increasing flexibility and availability of microcode space and of Basic Input/Output System (BIOS) memory space.
2. Description of Related Art
One of the most critical elements of a computer is its microprocessor. In general, a microprocessor is an embedded controller that includes a processor core featuring processing logic and core memory. In many architectures (e.g., INTEL.RTM. microprocessor architectures such as PENTIUM.RTM. and PENTIUM PRO.TM.--trademarks owned by Intel Corporation of Santa Clara, Calif.), a portion of the core memory is reserved to contain microcode. This portion is commonly referred to as microcode space.
Referring to FIG. 1, microcode space 100 usually is minimally sized to achieve cost savings and separated into two areas; namely, a first area 110 and a second area 120. The first area 110 is configured to store a set of n microcode instructions 130.sub.1 -130.sub.n (".mu.c instructions"), where "n" being a positive whole number. These microcode instructions 130.sub.1 -130.sub.n are executed after power-up to perform one or more tasks (e.g., initialization of state machines, diagnostics, etc.). Smaller in size than the first area 110, the second area 120 is microcode space configured to store m microcode patch instructions (MPI) 140.sub.1 -140.sub.m ("m" being a positive whole number). These microcode patch instructions 140.sub.1 -140.sub.m form one or more microcode patches, which are used to correct errors found in one or more microcode instruction(s) after being preloaded in silicon or in process functionality. These microcode patches allow minor fixes in microcode without requiring chip refabrication.
As shown in FIG. 2, for computers, the microprocessor 200 is usually attached directly to a motherboard 210 through a multi-pin socket 220. In this embodiment, microprocessor 200 includes core memory 230 capable of containing microcode. A fixed portion of this core memory 230 is writable during execution of Basic Input/Output System (BIOS) code contained in on-substrate, non-volatile memory 240. The storage space of this non-volatile memory 240 (referred to as a BIOS memory space) is also fixed in size.
Over the last few years, some disadvantages concerning the loading of microcode patches have been uncovered. For example, in order to avoid refabrication of the processor core due to faulty microcode, BIOS memory space has been configured to provide a microcode patch, if necessary, corresponding to each microcode executed by processor 200. This requires BIOS memory space to be structured so that it is capable of supporting a microcode patch for each version of microprocessor (e.g., desktop, server, laptop, etc.). However, unless the size and associated cost of non-volatile memory 240 is greatly increased, the limited size of BIOS memory space places a restriction on the number of microcode instructions and/or patches that can be supported by conventional PC platforms.
Additionally, each type of microprocessor may require different sizes of microcode space. Since microprocessors and memory devices containing BIOS are typically manufactured and distributed by different original equipment manufacturers (OEMs), available BIOS memory space may not match the needs of a given microprocessor when it is otherwise manufacturable. One solution would be to implement more memory dedicated to BIOS. The addition of memory would substantially increase the cost of the end product, which adversely effects the consuming public.
Another disadvantage is that microcode patches currently are distributed by diskette or through an electronic bulletin board on the Internet. These microcode patches are subsequently loaded into memory 230 of FIG. 2. However, this is an expensive distribution technique. Distribution through an electronic bulletin board over a Wide Area Network (WAN) may be less costly than using diskettes, but it is not a universal solution because certain products containing the microprocessor may not have access to the electronic bulletin board.
Yet another disadvantage is that the current microcode patch scheme is subject to reliability concerns when upgrading a microprocessor. For example, if the user upgrades his or her computer to include a more advanced microprocessor, two reliability problems may result. The first reliability problem may occur if non-volatile memory 240 is too small to support a microcode patch recommended for the more advanced microprocessor. This would require upgrading the motherboard 200 and/or replacement of non-volatile memory 240 which is more difficult and expensive to the user.
Similarly, the second reliability problem involves the condition where the microcode space of the more advanced microprocessor is too small to support an intended microcode patch. This would require re-coding of the microcode or refabrication of core memory of the microprocessor to increase its sizing. The later solution is contrary to the present trend of minimizing the amount of dedicated memory in order to optimize the use of real estate on the processor core. Either reliability problem would be costly to both the OEM as well as the final consumer.
Furthermore, the current architecture does not encourage development of a standard processor architecture to support multiple modes of functionality. Instead, each processor is specifically manufactured and loaded with microcode to support a particular operation mode (e.g., support operations of a desktop computer, OVERDRIVE.RTM. processor, server, etc.). This lack of standardization is due in part to a limited microcode space.
Likewise, each processor is loaded with one instruction set of microcode because, until now, it was infeasible for processor 200 to have access to multiple instruction sets. For example, these instruction sets could be directed to controlling different processor platforms such as a complex instruction set computer (CISC) platform or a reduced instruction set computer (RISC) platform.
Therefore, it would be desirous to develop an electronic system and method of operation which overcomes the above-described disadvantages.